A MTJ is a key component in MRAM, spin-torque MRAM, and other spintronic devices and comprises a stack with a tunnel barrier layer such as a metal oxide formed between two magnetic layers that provides a tunneling magnetoresistance (TMR) effect. One of the magnetic layers is a free layer and serves as a sensing layer by switching the direction of its magnetic moment in response to external fields while the second magnetic layer has a magnetic moment that is fixed and functions as a reference layer. The electrical resistance through the tunnel barrier layer (insulator layer) varies with the relative orientation of the free layer moment compared with the reference layer moment and thereby provides an electrical signal that is representative of a magnetic state in the free layer. In a MRAM, the MTJ is formed between a top conductor and bottom conductor. When a current is passed through the MTJ, a lower resistance (RP) is detected when the magnetization directions of the free and reference layers are in a parallel state and a higher resistance is noted when they are in an anti-parallel state. The magnetoresistive ratio (DRR) may be expressed as dR/RP where dR is the difference in resistance between the two magnetic states. Since MTJ elements are often integrated in CMOS devices, the MTJ must be able to withstand annealing temperatures around 400° C. for about 30 minutes that are commonly applied to improve the quality of the CMOS units for semiconductor purposes.
Spin-torque (STT)-MRAM based technologies are desirable for nonvolatile memory applications. However, realizing low critical dimensions below 100 nm that match those found in Dynamic Random Access Memory (DRAM) is a challenge. MTJs are highly susceptible to sidewall damage, both chemical and physical, induced by etching and deposition processes, and exacerbated by the CMOS process requirement of annealing at 400° C.
During fabrication of STT-MRAM devices, a MTJ nanopillar is typically defined by forming a pattern in an uppermost hard mask layer in the MTJ stack of layers, and then employing a physical etch (ion beam etch or IBE) or a chemical etch such as a reactive ion etch (RIE) with methanol to transfer the pattern through the MTJ stack thereby forming a plurality of MTJ nanopillars each with a critical dimension that is less than 100 nm for advanced devices. Subsequently, an encapsulation layer is deposited to electrically isolate MTJs from each other. The process flow of MTJ etching and encapsulation is a critical part of the CMOS integration flow and strongly influences the tunneling magnetoresistance ratio, especially for sub-100 nm device sizes.
The material and process selected to form the encapsulation layer around MTJ nanopillars must satisfy several criteria. In order to electrically isolate adjacent MTJs, the encapsulation layer must be a good dielectric material. Secondly, a tunnel barrier layer such as MgO is usually very hygroscopic which means the encapsulation layer should be an efficient moisture barrier. With regard to these two requirements, silicon based dielectric layers such as silicon oxide and silicon nitride have proven to be suitable encapsulation layer materials.
As spacial density of MRAM devices increases leading to a higher number of devices per unit area, the physical gap between adjacent MTJ nanopillars decreases. Therefore, a preferred encapsulation layer deposition method is one that provides excellent gap filling capability. In other words, highly conformal coatings provided by chemical vapor deposition (CVD) or atomic layer deposition (ALD) should be more suitable for such applications compared with physical vapor deposition (PVD) where shadowing effects are more severe.
In view of MRAM integration into CMOS technology, the encapsulation material needs to withstand exposure to 400° C. for two hours or more, and also protect the MTJ sidewall at these conditions.
There is a need to provide an encapsulation layer and process that meets all of the aforementioned requirements, especially for state of the art memory devices with a critical dimension of less than 100 nm.